[英]GNU Makefile automatic dependency resolve
I've been using qmake
and CMake
in the past without any problem to generate my makefiles. 我过去一直在使用
qmake
和CMake
来生成我的makefile,没有任何问题。 However, recently I figured on some of the clusters I run my codes these tools are harder to find/install so I've decided writing bare Makefiles. 但是,最近我发现在运行代码的某些集群上,这些工具很难找到/安装,因此我决定编写裸Makefile。 Besides I could also learn a thing or two about Makefiles ;)
另外我还可以学到一些关于Makefile的东西;)
My project involves several directories with source/header files inside and most often cross dependencies between them. 我的项目涉及多个目录,这些目录中包含源/头文件,并且大多数情况下它们之间是相互依赖的。 I've learned, through SO, to use
-MM
flag to automatically generate dependency information. 通过SO,我已经学会了使用
-MM
标志来自动生成依赖项信息。 My Makefiles look like this 我的Makefile看起来像这样
include $(HEAD_DIR)/common.mk
OBJS_DIR = objs
LIBS_DIR = libs
SRCS = Matrix.cpp MatrixFull.cpp
OBJS = $(patsubst %,$(OBJS_DIR)/%,$(SRCS:.cpp=.o))
LIB_0 = $(patsubst %, $(LIBS_DIR)/%,libalgebra.a)
DEPS := $(patsubst %,$(OBJS_DIR)/%,$(SRCS:.cpp=.d))
-include $(DEPS)
.PHONY: all
all:
@echo " ===== Building dependencies in lib/algebra ===== "
@$(MKDIR) $(OBJS_DIR)
@$(MAKE) $(OBJS)
@$(MKDIR) $(LIBS_DIR)
@$(MAKE) $(LIB_0)
@echo " ===================== done ===================== "
$(OBJS_DIR)/%.o: %.cpp
@echo " compiling source file: $< ..."
$(CXX) -c $(CXXFLAGS) -I$(INCLUDE_PATH) -MM $< -o $@
$(LIB_0): $($(OBJS_DIR)/%.o)
@echo " generating library file: $(@F) ..."
@$(AR) $(AR_FLAGS) $@ $^
.PHONY: clean
clean:
@$(RM) $(OBJS_DIR) $(LIBS_DIR)
This generally works fine but I'd like to improve on couple of things: 1) When I change a header file and I issue make
, somehow the compiler does not pick all
and seems to default to DEPS
. 这通常可以很好地工作,但是我想在以下几方面进行改进:1)当我更改头文件并发出
make
,编译器不知何故没有all
选择,并且似乎默认为DEPS
。 Is this supposed to happen in this makefile? 这应该在此makefile中发生吗? How can I make
all
the default rule? 我怎样才能使
all
默认规则? 2) How can I make depenency files invisible? 2)如何使依赖文件不可见? I tried
DEPS := $(patsubst %,$(OBJS_DIR)/.%,$(SRCS:.cpp=.d))
but that did not help 3) Is there any specific suggestion you could give me if you think this Makefile could be improved in any other way? 我尝试了
DEPS := $(patsubst %,$(OBJS_DIR)/.%,$(SRCS:.cpp=.d))
但这无济于事3)如果您认为此Makefile有什么特别的建议可以给我可以通过其他方式改进吗?
EDIT: To be honest, I'm not even sure how make invokes the compiler to generate dependencies :p ... I do not see any explicit rule for this. 编辑:说实话,我什至不知道如何make调用编译器来生成依赖项:p ...我没有看到任何明确的规则。 Is it somehow hidden in
DEPS := $(patsubst %,$(OBJS_DIR)/%,$(SRCS:.cpp=.d))
? 是否以某种方式隐藏在
DEPS := $(patsubst %,$(OBJS_DIR)/%,$(SRCS:.cpp=.d))
?
1) Move the -include $(DEPS)
down below the all
rule. 1)将
-include $(DEPS)
向下-include $(DEPS)
all
规则下方。 The first rule is the default rule (unless you deliberately set some special variable), so if include
pulls in a rule above all:
, that will be the default. 第一条规则是默认规则(除非您有意设置一些特殊变量),因此,如果
include
优先于以下规则all:
,则将成为默认规则。
2) I presume that by "make them invisible" you mean you want .foo.d
instead of foo.d
. 2)我相信,通过“让他们看不见”你的意思是你想
.foo.d
而不是foo.d
。 You have to modify the rule that makes them: 您必须修改使它们成为规则:
$(OBJS_DIR)/%.o: %.cpp
@echo " compiling source file: $< ..."
$(CXX) -c $(CXXFLAGS) -I$(INCLUDE_PATH) -MM $< -o $@
@mv $(OBJS_DIR)/$*.d $(OBJS_DIR)/.$*.d
and then the variable that finds them: 然后找到它们的变量:
DEPS := $(patsubst %.cpp,$(OBJS_DIR)/.%.d,$(SRCS))
3) I'd get rid of the recursive calls ( $(MAKE) ...
), but you should make sure everything else is working right first. 3)我会摆脱递归调用(
$(MAKE) ...
),但是您应该确保其他所有操作都首先正确进行。 And I'm surprised the $(OBJS_DIR)/%.o
rule doesn't go in common.mk
. 我很惊讶
$(OBJS_DIR)/%.o
规则不在common.mk
。 Other than that it looks pretty good. 除此之外,它看起来还不错。
4(?)) The compiler command in the $(OBJS_DIR)/%.o
rule uses the -MM
flag, so the compiler generates the dependency files as a side-effect. 4(?))
$(OBJS_DIR)/%.o
规则中的编译器命令使用-MM
标志,因此编译器生成依赖项文件作为副作用。
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