gcc makefile dependency wont generate

Question

I have the following simple makefile

#all: binsem.a ut.a ph 
FLAGS = -Wall  -L./

binsem.a:
    gcc $(FLAGS)  -c binsem.c
    ar rcu libbinsem.a binsem.o
    ranlib libbinsem.a 


ut.a:
    gcc $(FLAGS)  -c ut.c
    ar rcu libut.a ut.o
    ranlib libut.a 

clean:
    rm -f *.o 
    rm -f a.out
    rm -f *~
    rm -f ph
    rm -f *a 

The problem is it only generates binsem.a and not ut.a, probably because of dependencies issues.

I tried looking at the flags but did not find the answer.

Thanks a lot.

Answer 1

By default, if you don't specify a target on the command line, make will build the first target it finds (and it's dependencies if it has any). Your first target is binsem.a , and you don't list any dependencies, so that's the only thing that gets built.

Try something like adding this at the top:

all: binsem.a ut.a

And mention the dependencies in your other targets:

binsem.a: binsem.c
...
ut.a: ut.c