MIPS Architecture SRA, SLL, SRL

Question

I am suppose to design and implement a MIPS processor using vhdl. However, while going through the MIPS architecture, i notice that SRA, SLL SRL functions shifted the value in the register by the amount in the shamt portion (10th to 6th bits) of the instruction. Do i need to create another signal to the ALU to pass in the shift values for these functions?

Answer 1

The short answer...yes. In your multiplexer you should have one signal specifically for instructions with argument types similar to the shift instructions (ie with the bits laid out with a shamt). Your decoder should take that shamt value from the instruction and store it in a $t register before doing shift operations. It would be easier to help you if you edited your question to include some of your assembly, or a block diagram of your circuit.