Store word in 32-bit MIPS assembly

Question

I have a doubt about the store word instruction in 32-bit MIPS assembly. Assuming that I have this in the data section:

.data
vector: .word 2,3,4,5,6......

and that the vector in memory starts from address 10 (decimal base example). When I do:

.text
 sw $t0,vector($t1)

is the label vector is replaced with 10?

EDIT:

li $v0, 1 
la $a0,vector 
syscall 

I did so and I saw the start address but I don't understand a thing: if the immediate field is 16-bit and the label is replaced with the start address of vector , with 16 bit how do I address all memory?

Answer 1

You need to calculate the address manually. MIPS doesn't have load effective address instruction (LEA) like x86

la $t1, vector
sw $t0, 0($t1)

If the absolute address value fits within 16 bits, you can use absolute addressing

sw $t0, vector($zero)

If $t1 contains the address to the data segment then use this

sw $t0, vector($t1)

I don't know the assembler's syntax so you may need to specify something to get the offset of absolute address

Answer 2

The assembler is helping you out behind the scenes. The register number 1, aka. $at is reserved as assembler temporary (hence the name). If the address doesn't fit into the available bits, the assembler will generate extra instructions that calculate the full address using $at . You can see that if you disassemble the resulting object file:

   0:   3c010000        lui     at,0x0
                        0: R_MIPS_HI16  .data
   4:   00290821        addu    at,at,t1
   8:   ac280000        sw      t0,0(at)
                        8: R_MIPS_LO16  .data

After linking, the above snippet may look like this:

  400000:       3c010040        lui at,0x40
  400004:       00290821        addu    at,at,t1
  400008:       ac28100c        sw  t0,4108(at)

The address of vector has been split into the low and high 16 bit halves with separate relocations. First, the lui will load the high 16 bits into $at . Then the value of $t1 is added. Finally, the low 16 bits of vector are encoded in the sw instruction itself.