Makefile: File doesn't exist when the file does exist

Question

# Arquitectura
CC := arm-none-eabi-

# Compiladores
GCC :=$(CC)gcc
AS :=$(CC)as
LIBC :=$(CC)ar

# Linker
LINKER :=$(CC)ld

# Flags compilação
FLAGDEBUG :=-g
CFLAGS :=-c -mapcs #-Wall
CDEPEND :=-MM -MF
LIBFLAG := rcs
LDSCRIPT := -T
LDLIBDIR := -L
LDLIBLIBS := -l

# $@ -> nome do alvo .. $^/S? lista de dependencias .. $* contêm o valor de % .. $< contêm a              primeira dependencia


# Pastas
DEPDIR := Depends/
SOURCEDIR := Source/
SOURCECDIR :=$(SOURCEDIR)C/
SOURCEADIR :=$(SOURCEDIR)Assembly/
LIBDIR := Library/
HEADDIR := Header/
OBJDIR := Object/

# Dependencias
SOURCEC := $(wildcard $(SOURCECDIR)*.c)
SOURCEA := $(wildcard $(SOURCEADIR)*.S)
OBJC :=$(patsubst $(SOURCECDIR)%.c,%.o,$(SOURCEC))
OBJA :=$(patsubst $(SOURCEADIR)%.S,%.o,$(SOURCEA))
HEADER :=$(wildcard $(HEADDIR)*.h)
LIBL = $(wildcard $(LIBDIR)*.a)
#LIBL = $(wildcard $(LIBDIR)lib*.a)
DEPEND :=$(patsubst %.o,$(DEPDIR)%.d,$(OBJC))
SCRIPT := $(wildcard *.ld)
LIB =
# Ficheiros de output
FICHDEBUG := Teste.axf
FICHRELEASE := Release.axf


debug: $(FICHDEBUG)

# Executável para debug
$(FICHDEBUG):$(OBJA) $(OBJC)
   @echo A efectuar a linkagem dos módulos para gerar o executável $@
   @$(LINKER) $(OBJA) $(OBJC) $(LDSCRIPT) $(SCRIPT) -o $@

# Compilar ficheiros .S e .c
%.o:$(SOURCEADIR)%.S 
   @echo A compilar $@ a partir de $*.S
   @$(AS) $(FLAGDEBUG) $< -o $@

%.o:$(SOURCECDIR)%.c 
   @echo A compilar $@ a partir de $*.c
   $(GCC) $(CDEPEND) $(patsubst %.o,$(DEPDIR)%.d,$@) $<
   $(GCC) $(FLAGDEBUG) $(CFLAGS) $< -o $@

-include $(DEPEND)

release: $(FICHRELEASE) 

$(FICHRELEASE): $(OBJA) $(OBJC)
   @echo A efectuar a linkagem dos módulos para gerar o executável $@
   @$(LINKER) $(OBJA) main.o $(LDSCRIPT) $(SCRIPT) -o $@ $(LDLIBDIR) $(LIBDIR) $(LDLIBLIBS) 

# Gerar bibliotecas necessárias
gerarLib:$(HEADER)
    @echo $(HEADER)

$(HEADDIR)%.h: %.o 
   @echo $@ $*
   @$(eval LIB = $(patsubst $(HEADDIR)%.h,$(LIBDIR)lib%.a,$@))
   $(LIBC) $(LIBFLAG) $(LIB) $(patsubst $(LIBDIR)lib%.a,%.o,$(LIB))


.PHONY: clean
clean:
   @ rm -rf $(DEPDIR)*.d $(SOURCEDIR)*/*~ *~ *.o $(LIBDIR)*.a *.axf *.o

So heres the makefile I'm using. As it is it generates the code as its supposed ant it updates correctly when any file changes(.h or .c), the issue is the dependencies generated do not have the proper object path set(I've read its a bug in gcc when it writes to file the dependencies) so I thought I'd make a script that simply adds the path to it and it would work and I'd be able to put my object files where they belong(Object folder) however every time I try to run make after the initial compilation(which works fine btw) it gives me an erro saying one of the header files doesn't exist(which is untrue since the file is there and I can access it).

Anyone have an idea of whats happening?(to change between the "modes" I simply write $(OBJDIR) before every %.o and *.o)

Answer 1

This rule looks suspicious:

$(HEADDIR)%.h: %.o 
   @echo $@ $*
   @$(eval LIB = $(patsubst $(HEADDIR)%.h,$(LIBDIR)lib%.a,$@))
   $(LIBC) $(LIBFLAG) $(LIB) $(patsubst $(LIBDIR)lib%.a,%.o,$(LIB))

It claims to be creating .h files from .o files, but that seems unlikely, given the rules.