VHDL strange when-statement error (syntax)

Question

We've been having a really strange, yet simple when-statement error in our VHDL code, by now we've tried everything we could think of but the program still complains about a syntax error (near the first "when") in the statement.

    ALUsource <= '0';
            with FuncCode select
                    ALUcontrol <=   "10" when "0x20",
                                    "10" when "0x22",
                                    "00" when "0x24",
                                    "01" when "0x25",
                                    "11" when "0x2A",
                                    "00" when others;

            with FuncCode select
                    SubFlag <=     '1' when "0x22",
                                   '0' when others;

            with FuncCode select   
                    W_ena <=       '1' when "0x20",
                                   '1' when "0x22",
                                   '1' when "0x24",
                                   '1' when "0x25",
                                   '1' when "0x2A",
                                   '0' when others;


    when OPcode /= "000000"
            with OPcode select
                    ALUcontrol <=   "10" when "0x08",
                                    "11" when "0x0A",
                                    "00" when others;

Answer 1

As previous comments said, this example is not complete and therefore hard to tell where the error is, but i take a guess and suggest writing

when OPcode /= "000000" =>

instead of

when OPcode /= "000000"