GNU make ignores slash on cmd.exe

Question

I had a problem with GNU make on cmd.exe. Somehow it ignores '/' output by dir and says there is no rule.

$(foreach f,$(OBJS),$(eval $f : | $(dir $f)))

%/:
    mkdir -p $@

So I made this dirty hack.

$(foreach f,$(OBJS),$(eval $f : | $(dir $f)D))

%/D:
    mkdir -p $@

Any better solution? Please do not tell me to throw the broken shell away. I don't use the shell, but others use it.

Answer 1

As far as I know target pattern matching doesn't have anything to do with the shell make will eventually use to run recipe targets. It is done entirely internally to make.

That said that exact makefile snippet (using OBJS := a/ao b/bo c/co ) works for me with make 3.81, 3.82, 4.0 and 4.1 on CentOS 5. (I don't have make on Windows to test with.) So maybe there is something OS-specific involved here.

You could try removing the / and just using % as the target?

That all said a better solution might be to assign the directory components to a variable and use that variable as the target.

DIRS :=
$(foreach f,$(OBJS),$(eval $f : | $(dir $f)) $(eval DIRS += $(dir $f)))

$(DIRS):
    mkdir -p $@