Makefile:1: *** missing separator. Stop

Question

my makefile is

 obj - m+= jurgen.o
all:
        [Tab] -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
        [Tab] -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean

Answer 1

Your spacing looks odd.

Line 1 is

obj - m+= jurgen.o

I'd expect

obj-m += jurgen.o

Additionally:

You can simplify the rest of the file:

.PHONY:%
all: modules

build_dir = /lib/modules/$(shell uname -r)/build

%:
    $(MAKE) -C $(build_dir) M=$(PWD) $@

I'ved reduced duplication, and put the build directory into an overridable variable, so that you can compile for any kernel you have the headers for, not just your currently running one. I also added .PHONY so a file called all or clean won't prevent Make doing its job.

Answer 2

---

The "standard" module Makefile :

obj-m    := jurgen.o

KDIR    := /lib/modules/$(shell uname -r)/build
PWD    := $(shell pwd)

default:
    $(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules

clean:
    rm -rf *.o *.ko *.mod.* *.symvers *.order

---