Makefile match any target / task

Question

I want to write a makefile that can be run with any task and just echo all the task names.
Is there any way to do this?

Like:

%.%: 
    echo "$@"

Answer 1

Assuming that your make is GNU make or alike, use the following Makefile:

.PHONY: all

%:
       @echo "Here I am! $@"

See the result:

> make first
Here I am! first
> make second
Here I am! second
> make first second
Here I am! first
Here I am! second