I'm a noob with make in general so apologies in advance.
I have a folder structure, where foo.cpp is in the root of the project and all other .cpp files are in one and all headers in another folder. Whenever I change something make just says that everything is up to date.
Working on windows 10.
The code is from
my makefile:
OBJS = foo.o bar.o
CC = g++
INCLUDE_PATHS = -IC:\Mingw_libs\include\SDL2
LIBRARY_PATHS = -LC:\Mingw_libs\lib -Iheaders
COMPILER_FLAGS = -std=c++11
LINKER_FLAGS = -lmingw32 -lSDL2main -lSDL2 -lSDL2_image
OUTPUTFILE = main
all: $(OBJS)
$(CC) $(OBJS) $(INCLUDE_PATHS) $(LIBRARY_PATHS) $(LINKER_FLAGS) -o $(OUTPUTFILE)
clean:
rm *.o
rm *.exe
foo.o:
$(CC) -c foo.cpp $(INCLUDE_PATHS) $(COMPILER_FLAGS) $(LIBRARY_PATHS) $(LINKER_FLAGS)
bar.o:
$(CC) -c sources/bar.cpp $(INCLUDE_PATHS) $(COMPILER_FLAGS) $(LIBRARY_PATHS) $(LINKER_FLAGS)
You should declare target dependencies like that:
foo.obj: foo.c
....
Otherwise make will not now wich files to check for changes.
Your makefile has no dependencies for foo.o
or bar.o
.
This
all: $(OBJS)
$(CC) $(OBJS) $(INCLUDE_PATHS) $(LIBRARY_PATHS) $(LINKER_FLAGS) -o $(OUTPUTFILE)
says all
depends on $(OBJS)
. So when one of the files in $(OBJS)
changes, that step is run.
This says foo.o
depends on nothing:
foo.o:
$(CC) -c foo.cpp $(INCLUDE_PATHS) $(COMPILER_FLAGS) $(LIBRARY_PATHS) $(LINKER_FLAGS)
You need to add the dependency:
foo.o: foo.cpp
$(CC) -c foo.cpp $(INCLUDE_PATHS) $(COMPILER_FLAGS) $(LIBRARY_PATHS) $(LINKER_FLAGS)
Note that the spaces after the :
usually need to be a tab, not actual space(s).
You need to add dependencies to your target. Make has the syntax
target : prerequisite
command
So in your case:
foo.o: foo.cpp
$(CC) -c $< $(INCLUDE_PATHS) $(COMPILER_FLAGS) $(LIBRARY_PATHS) $(LINKER_FLAGS)
same with bar
the $<
is a placeholder for the first prerequisite. So you don't have to type foo.cpp
twice.
You can checkout more automatic variables here: https://www.gnu.org/software/make/manual/make.html#Automatic-Variables
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