简体   繁体   中英

TST, AND operation in ARM assembly. Why is only the LSBit considered?

In reference to ARM assembly:

I have some confusion regarding the TST operation in the following lines of code which test to see if a number is even or odd:

mov R0, #167

TST R0, #1 //AND operation 
addeq ... //add if even
addne ... //add if not even

My question is why is the TSt operation only considering the least significant bit (LSB) to figure out if the number is even or not, and not looking at the rest of the bits in #167 (which has LSB's 0111)

Since TST 167,1 would AND 167 and 1 which would AND LSB's (0111 and 0001), and even though the LSB would AND to =1, wouldn't ANDing the 2nd LSB cause the TST operation to output 0?

To test if a number in binary is even or odd, all you need to do is check the rightmost (least significant) bit. The other bits don't matter, since all of their "values" are non-zero powers of two, ie even numbers.

Adding even numbers together will never produce an odd number, so they don't matter.

The result of bitwise-ANDing 167 and 1 is 1, which is not zero. Not sure why you worry so much about the rest of the bits, since the second argument to the bitwise AND is just 1, no other bits than the LSB matter (they will all be masked off and forced to 0 in the implicit result).

The Z flag is set based on the entire result being either zero or not. ie it's a horizontal OR of all the bits in 167 & 1 .

If you want 32 separate per-bit zero-or-not results, you use an AND and look at the integer register result, not the flag result.

The technical post webpages of this site follow the CC BY-SA 4.0 protocol. If you need to reprint, please indicate the site URL or the original address.Any question please contact:yoyou2525@163.com.

 
粤ICP备18138465号  © 2020-2024 STACKOOM.COM