TIMER0 not executing multiple compare match register interrupt requests.(MSP430)

Question

OK so I have been attempting to create some code using a MSP430FR5994 TI launch pad that utilizes Timer0 and 3 separate compare registers to trigger 3 separate isr's. I have successfully got one to work however as soon as I add another compare register the CCIFE flag sets and never competes the execution of the second isr. I have watched the code in the debugger on both CCstudio and IAR same thing happens in both, the set up registers are correct and the TA0R registers is counting and will trigger the first isr based on the TA0CCR0 but all other compare regs R1 2 3 etc will not trigger and execute successfully. The code is below, idea's on what I am doing wrong would be much appreciated.

#include "msp430.h"
#include <stdbool.h>
#define COUNT_1 12000 
#define COUNT_2 800


int main( void )
{
  // Stop watchdog timer to prevent time out reset
  WDTCTL = WDTPW + WDTHOLD;

  PM5CTL0 &= ~LOCKLPM5;

  P1DIR |= BIT0 + BIT1;
  P1OUT = BIT0 + BIT1; 


   //set up and enable timer A or TA0 for continous mode 

  TA0CCR0 = COUNT_1;
  TA1CCR1 = COUNT_2;  
  TA0CTL = TASSEL__ACLK + MC_2;  //set the max period for 16bit timer operation
  TA1CTL = TASSEL__ACLK + MC_2;
  TA0CCTL0 = CCIE;  //enable compare reg 0
  TA1CCTL1 = CCIE;  //enable compare reg 1
  //TA0CTL |= TAIE;

  _BIS_SR( GIE); //ENABLE GLOBAL INTERRRUPTS

  //set the max period for 16bit timer operation


  while(true){}


  }

#pragma vector= TIMER0_A0_VECTOR    //compare interrupt 0 flahse red led
__interrupt void TIMER0_A0(void) {
  P1OUT ^= BIT1 ;

}

#pragma vector = TIMER1_A1_VECTOR   //compare interrupt 1 flashes green led
__interrupt void TIMER1_A1(void) {

 P1OUT ^= BIT0;

}

Answer 1

The User's Guide says in section 25.2.6.1:

The TAxCCR0 CCIFG flag is automatically reset when the TAxCCR0 interrupt request is serviced.

However, this does not happen for the other CCRx interrupts, because multiple ones use the same interrupt vector. Section 25.2.5.2 says:

The highest-priority enabled interrupt generates a number in the TAxIV register (see register description). […]
Any access, read or write, of the TAxIV register automatically resets the highest-pending interrupt flag.

So you always have to read the TAxIV register (and with three or more CCRs, you need it to find out which CCR triggered the interrupt):

__interrupt void TIMER1_A1(void) {
    switch (TA1IV) {
    case TAIV__TACCR1:
        P1OUT ^= BIT0;
        break;
    case TAIV__TACCR2:
        ...
        break;
    }
}