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Why does my new PowerPC interrupt handler crash only when caches are on

I'm using a PowerPC 750 and have just started experimenting with the external interrupt.

I have an interrupt-driven mini program that works fine provided the data cache is off. If I turn the cache on then the PowerPC crashes on the first access to a memory-mapped peripheral after the external interrupt has fired.

This surprises me because:

  • My understanding is that when the exception handler is called the processor's addressing is in 'real mode' and that, as all my addresses are the same in real and in translated mode, accesses should work normally.

  • The peripheral is in space marked as non-cached in a DBAT

Is there something you have to do with the cache / addressing after an external exception that I've missed?

In the end I re-enabled address translation for instructions and data as the first operation in my external interrupt hander. Seems to avoid the problem.

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