makefile circular dependency and overriding commands

Question

Have a reference makefile that im slowly editing and using which spits out these two errors

Makefile:25: warning: overriding commands for target `build/semanticHash'
Makefile:21: warning: ignoring old commands for target `build/semanticHash'
make: Circular build/semanticHash <- build/semanticHash dependency dropped.
cc -g -ldl  -lgsl -lgslcblas -lzmq  -O2 -Wall -Wextra -Isrc -rdynamic -DNDEBUG  -fPIC   -c -o src/semanticHash/rmb.o src/semanticHash/rmb.c

I'm new to makefile syntax and rules, so any common mistakes I Google for, but no luck for myself in this case.

So the question is, where am I causing these errors, and is there any patterns that I should avoid in my current makefile?

CFLAGS= -g $(LIBS) -O2 -Wall -Wextra -Isrc -rdynamic -DNDEBUG $(OPTFLAGS)
LIBS= -ldl  $(OPTLIBS)
PREFIX?=/usr/local
OPTLIBS= -lgsl -lgslcblas -lzmq 

SOURCES=$(wildcard src/**/*.c src/*.c)
OBJECTS=$(patsubst %.c,%.o,$(SOURCES))

TEST_SRC=$(wildcard tests/*_tests.c)
TESTS=$(patsubst %.c,%,$(TEST_SRC))

TARGET=build/semanticHash  # Rename to library !!!!!
SO_TARGET=$(patsubst %.a,%.so,$(TARGET))

# The Target Build
all: $(TARGET) tests


$(TARGET): CFLAGS += -fPIC
$(TARGET): build $(OBJECTS)
    ar rcs $@ $(OBJECTS)
    ranlib $@

$(SO_TARGET): $(TARGET) $(OBJECTS) 
    $(CC) -shared -o $@ $(OBJECTS) 

build:
    @mkdir -p build
    @mkdir -p bin

# The Unit Tests
.PHONY: tests
tests: CFLAGS += $(TARGET)
tests: $(TESTS)
    sh ./tests/runtests.sh

valgrind:
    VALGRIND="valgrind --log-file=/tmp/valgrind-%p.log" $(MAKE)

# The Cleaner
clean:
    rm -rf build $(OBJECTS) $(TESTS)
    rm -f tests/tests.log 
    find . -name "*.gc*" -exec rm {} \;
    rm -rf `find . -name "*.dSYM" -print`

# The Install
install: all
    install -d $(DESTDIR)/$(PREFIX)/lib/
    install $(TARGET) $(DESTDIR)/$(PREFIX)/lib/

Answer 1

You set SO_TARGET to the same as TARGET :

TARGET=build/semanticHash  # Rename to library !!!!!
SO_TARGET=$(patsubst %.a,%.so,$(TARGET))

As seen TARGET does not end with .a , so nothing will be substituted making SO_TARGET the same.

Later you have

$(SO_TARGET): $(TARGET) $(OBJECTS) 

As both SO_TARGET and TARGET are the same, you have a circular dependency.

The other two warnings are because of this issue as well, as you have conflicting commands for the same target.

On an unrelated note, you should not mix compiler and linker flags like you do. Compiler flags are for compilation, linker flags for linking. You should also change the order of the linker options, and place the libraries to link with after the object files. This is because the GNU linker doesn't load libraries if there isn't anything depending on them, and dependencies are not loaded until it loads the object files.