[英]How can I make an FPGA display multiple (four) digits on a seven segment display?
[英]I'd like to display the segment according to differnet clocks, but I can't
棒形状固定在片段的左侧,点片段要根据时钟单独显示。 但与此同时,它显示了这是一个示例图片https://imgur.com/LXGVUJO
++))我想要这张图片https://imgur.com/mco1q7P
library ieee;
use ieee.std_logic_1164.all;
entity adventure is
port(clk : in std_logic;
dot_seg : out std_logic;
select_seg : out std_logic_vector(7 downto 0);
player_in : in std_logic_vector(1 downto 0);
seg : out std_logic_vector(6 downto 0));
end adventure;
architecture behavior of adventure is
signal dot_clk : std_logic;
signal player_clk : std_logic;
begin
process(clk)
variable dot_cnt : integer := 0;
variable player_cnt : integer := 0;
begin
if rising_edge(clk) then
if dot_cnt >= 5000000 then -- dot_seg clk
dot_cnt := 0;
dot_clk <= not dot_clk;
else
dot_cnt := dot_cnt + 1;
end if;
if player_cnt >= 50005 then -- player_seg clk
player_cnt := 0;
player_clk <= not player_clk;
else
player_cnt := player_cnt + 1;
end if;
end process;
process(clk, dot_clk, player_clk)
begin
if player_clk = '1' then -- player
case player_in is
when "00" => seg <= "1000110";
when "01" => seg <= "1000011";
when "10" => seg <= "0010101";
when "11" => seg <= "1000110";
end case;
select_seg <= "01111111";
end if;
if dot_clk = '1' then -- dot(road) segment
dot_seg <= '1'; ---- put in seg <= "0000000"; ???
select_seg <= "01011111";
else
dot_seg <='1'; ---- put in seg <= "0000000"; ???
select_seg <= "10101111";
end if;
end process;
end behavior;
为你的第二个过程尝试类似的东西
signal digit_display : std_logic := '0';
process(clk)
begin
if rising_edge(clk) then
digit_display <= not(digit_display);
if digit_display = '1' then
dot_seg <= '0';
if player_clk = '1' then -- player
case player_in is
when "00" => seg <= "1000110";
when "01" => seg <= "1000011";
when "10" => seg <= "0010101";
when "11" => seg <= "1000110";
select_seg <= "01111111";
end case;
end if;
else
seg <= "0000000"; -- Full off, I don't know polarity
if dot_clk = '1' then -- dot(road) segment
dot_seg <= '1';
select_seg <= "01011111";
else
dot_seg <='1';
select_seg <= "10101111";
end if;
end if;
end if;
end process;
如果clk太快而无法使用digit_display闪烁,你可以像这样放一个计数器:
signal digit_display_count : unsigned(15 downto 0) := (others => '0');
if digit_display_count = 100 then -- Choose an appropriate value
digit_display <= not(digit_display);
digit_display_count <= (others => '0')
else
digit_display_count <= digit_display_count + 1;
end if;
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