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SystemVerilog中的循环积分器运算符

[英]Circular Integrator Operator in SystemVerilog

原文 2018-08-17 12:23:04 8 1 verilog/ system-verilog

I am currently working on a project about mixed-signal IC design using SystemVerilog - Real Number Modeling (RNM). 我目前正在使用SystemVerilog-实数建模（RNM）进行有关混合信号IC设计的项目。 I have to convert an expression argument into its integrated form. 我必须将表达式参数转换为其集成形式。 I know there is a circular integrator operator in Verilog-A, idtmod() , but until now, I have not managed to find any equal operator in SystemVerilog. 我知道Verilog-A中有一个循环积分运算符idtmod() ，但是直到现在，我还没有在SystemVerilog中找到任何相等的运算符。

If anyone has any knowledge about this matter, I would much appreciate it. 如果有人对此事有任何了解，我将不胜感激。

1 个解决方案

You cannot do this in SystemVerilog. 您不能在SystemVerilog中执行此操作。 Verilog-A works in the continuous time domain and knows how to compute integral expressions over a time period. Verilog-A在连续时域中工作，并且知道如何在一个时间段内计算整数表达式。 SystemVerilog works with discrete time events. SystemVerilog可处理离散时间事件。 It can only sample a signal at a particular time. 它只能在特定时间采样信号。 So depending on the expression you want integrated, you need to approximate the integral over the sample period. 因此，根据要积分的表达式，您需要在采样期间近似积分。