[英]Interrupt handling with fpga in VHDL
I am writing interputs for a fpga and dsp need to interact with a dual port memory shared dpram control in vhdl.我正在为 fpga 编写输入,dsp 需要与 vhdl 中的双端口内存共享 dpram 控件进行交互。 I have External IOs coming from the SPI bus on oneside to the fpag to be communicated with dsp and on the otherhand have a camera to the to the dsp.
我有外部 IO 从一侧的 SPI 总线到要与 dsp 通信的 fpag,另一方面有一个摄像头连接到 dsp。 So my intrups are like Havinf a FIFO being reset after everytime a FSM reads and writes the interrpts with dsp.
因此,我的中断就像 Havinf,每次 FSM 使用 dsp 读取和写入中断后都会重置 FIFO。
Now my problem is现在我的问题是
I use the following algorithm to deal with all asynchron inputs:我使用以下算法来处理所有异步输入:
If you get some flags which remains in register even after processing, the reason can be:如果您得到一些即使在处理后仍保留在寄存器中的标志,原因可能是:
So can any one suggest any algorithm to enable particular interupts while the the camera is still communicating with DSP.因此,任何人都可以提出任何算法来在相机仍在与 DSP 通信时启用特定的中断。
Your question is not clearly worded enough to enable a proper answer.您的问题措辞不够明确,无法给出正确答案。 But one point is clear : XOR is not a good choice for an interrupt mask!
但有一点很清楚:XOR 不是中断掩码的好选择! Either AND or OR would be a better choice depending on the logic of the interrupt handler.
根据中断处理程序的逻辑,AND 或 OR 将是更好的选择。
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