I am writing interputs for a fpga and dsp need to interact with a dual port memory shared dpram control in vhdl. I have External IOs coming from the SPI bus on oneside to the fpag to be communicated with dsp and on the otherhand have a camera to the to the dsp. So my intrups are like Havinf a FIFO being reset after everytime a FSM reads and writes the interrpts with dsp.
Now my problem is
I use the following algorithm to deal with all asynchron inputs:
If you get some flags which remains in register even after processing, the reason can be:
So can any one suggest any algorithm to enable particular interupts while the the camera is still communicating with DSP.
Your question is not clearly worded enough to enable a proper answer. But one point is clear : XOR is not a good choice for an interrupt mask! Either AND or OR would be a better choice depending on the logic of the interrupt handler.
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