Which kinds of reordering optimizations do x86 CPUs do?

Question

In his blog post , Eric Lippert says that:

I note that on x86-based hardware this particular reordering of writes is actually never observed; those CPUs do not perform this optimization.

Does this mean that x86 CPUs do not have any of the issues that are talked about when discussing volatility and reordering of reads and writes, or does he mean that only in this example the CPU won't reorder?

What types of reorderings can happen in an x86_64 CPU and under which circumstances?

Answer 1

Does this mean that x86 CPUs do not have any of the issues that are talked about when discussing volatility and reordering of reads and writes, or does he mean that only in this example the CPU won't reorder?

It means that stores are not rearranged in x86 CPUs; loads can still be moved backward through. Then, it is important to understand what x86 means. In the context of this post, it means only x86 and not its derivatives. The x86 oostore architecture enables far more memory reordering than the basic x86 implementation. You can get all the details here: http://en.wikipedia.org/wiki/Memory_ordering

There are plenty of examples around for this use case like the following:

• http://preshing.com/20120515/memory-reordering-caught-in-the-act/
• http://moodycamel.com/blog/2013/a-fast-lock-free-queue-for-c++

Also, reordering cannot cross method call boundaries on this architecture.

Aside from reordering, just about any CPU architecture can cache values which is a far more visible optimization. Here is a good use case for this optimization:

http://www.codeproject.com/Articles/389730/The-unsung-hero-Volatile-keyword-Csharp-threading