Suppose you have C code for x86 systems code like this:
volatile uint32_t *reg = (volatile uint32_t *)0xCAFEBABE;
// ...
reg[0x10] |= 1;
Is GCC free to generate a read-modify-write instruction here? If so, will encapsulating the read and write to the volatile variable in functions make sure that GCC does not combine the accesses into a single RMW instruction?
I know that the C spec is intentionally vague about this.
The C standard does not specify what instruction is to be used. For a simple update like this gcc
is most liklely to generate a single RMW instruction the style of
orl (%rdx), $1
The volatile
keyword has nothing to do with it though. any combination of load, modify, store
would have been valid too. The volatile
keyword only tells the compiler to reload the value from memory on every use instead of using register caching optimisations.
If you want an atomic update then you need atomics, gcc provides for this _sync_fetch_and_or(type *, type)
The technical post webpages of this site follow the CC BY-SA 4.0 protocol. If you need to reprint, please indicate the site URL or the original address.Any question please contact:yoyou2525@163.com.