I'm trying to do a Makefile.am who find all the dependency (c and cpp files) at runtime (make).
I test this command :
example_SOURCES=$(shell find . -type f | grep -E '\.c|\.cpp' | awk '{L[NR]=$$0} END {{for (i = 1; i <=NR-1;i++) print L[i]"\\"}; {print L[NR]}}')
The command works fine ( I have controlled with the add of a redirection in a file and the sources are fine).
But the makefile, doesn't use any sources :
gcc -g -O2 -o example
How can I archive my objective for auto-founds all sources ?
ps I have read that automake must know all sources at call, this is correct ? This can be an explanation why my script doesn't work.
More details : I have modify the Makefile generate and place an echo on example_sources and he contain all my files.
I have check the differences between the Makefile with my script and without and the main point is this part :
With script :
am_example_OBJECTS =
With manual dependency :
am_example_OBJECTS = ./main.$(OBJEXT)
He appear the automake need to know the sources files himself for generate the makefile.
So I have found a workaround,
I use a sed to change the Makefile.am during the configure.
# Source + dependency.
files=`find ./src/ -type f | grep -E '\.h$$|\.hpp$$|\.c$$|\.cpp$$' | sed 's/\/src//g'`
sed -i '/.*_SOURCES.*/c\'"$soft"'_SOURCES = '"$files"'' src/Makefile.am
It's work fine, when we add sources, we just need to do ./configure to update the dependency list.
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