how to copy the register in hypothetical CPU ISA using assembly

Question

Given following Instruction in a hypothetical CPU ISA with register space AZ , write an assembly program to copy N bytes from address A to address B

MOV C, 100 - Move a constant value 100 to register C
LDR A, Addr – Load Register A with contents of address Addr
STR B, Addr - Store the contents of register B to address Addr
CMP X, Y - Compare X & Y and set Equal/Less than and Greater than status flags
BEQ address – Branch/Jump to address, on status flag Equal is set
BGT address – Branch on greater than
BLT address – Branch on less than

Can any one please let me know how can this be done, i have no clue because without inc , dec and some arithmetic instructions, how can I proceed?

I do not need the code but any clue how can i proceed for this is appreciated in advance.

Answer 1

What addressing modes do ldr / str support? Can you ldr C, 4(A) ? If so, you can fully unroll the loop up to whatever displacement limit the addressing mode allows.

Still including the compares, though, unless you can treat N as a build-time constant (which would make sense because you're asked to write a program, not a function...)

eg

    cmp   N, 1
    blt   done
    ldr   C, 0(A)
    str   C, 0(B)

    cmp   N, 5       # registers are probably 4 bytes wide, if addresses are 32-bit
    blt   done
    ldr   C, 4(A)    # copy next word
    str   C, 4(B)

    cmp   N, 9
    beq   done
    ...
done:

With registers wider than 1 byte, it's impossible to copy only a single byte. (With no ALU instructions to merge a byte into the old value of a word, and no byte store).

Assuming that registers are 4 bytes wide (because OP says it has 32-bit addressing), 4 bytes is the minimum we can copy. If the machine allows unaligned addresses, we could copy any amount from 4 upward by increasing the addresses 1 byte at a time, but the code above always copies a multiple of 4 bytes.

If the machine only supports word-aligned load/store, overlapping the last word by 3 bytes wouldn't even be an option.

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Or you could implement INC with a fully-unrolled search for the next highest number, using MOV immediate and CMP/BEQ . (Or BLT / BGT for a binary search).

I'm inventing syntax for address-in-a-register on the assumption that A was supposed to be a register name, not a label

.copyloop:
    ldr    C, (A)
    str    C, (B)

    mov    D, 2
    cmp    A, 1
    beq    .found_A

    mov    D, 3
    cmp    A, 2
    beq    .found_A

    mov    D, 4
    cmp    A, 3
    beq    .found_A

    ...

 .found_A:
    mov    A, D       # presumably this is allowed, not only the mov-immediate form shown?

    # Then repeat that for B

    cmp    A, end_pointer   # end_pointer is a register holding a value you calculated somehow.
    blt  .copyloop

If your instruction-set is really that crippled, then your computer is barely programmable, and requires massive programs that enumerate every possible value a register might have.

You can use a binary search to make increment run in O(log(register_width)) time instead of O(value) time.

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Perhaps you can store a lookup-table in memory that lets you implement inc A as ldr A, 5000(A) . Except if memory is byte-addressable but words are wider than a byte, you need a scaled-index for the table, so this doesn't work.