Looking for Mapping between RISC-V base 32I Instructions and their Opcodes

Question

Is the encoding of risc-v instructions to opcode bits standardized? If so, where can I find the encoding table at least for the base 32I instructions?

Answer 1

I guess it is always a good idea to keep up to the specs on https://riscv.org/specifications/ . There chapter 25 lists in details how to encode the instructions. I also liked http://riscvbook.com very much.

Regards Joachim

Answer 2

It looks like I found it in github.

https://github.com/riscv/riscv-opcodes/blob/master/opcodes

Answer 3

The tables in The RISC-V Reader book that Joachim mentioned are very good ( https://riscvbook.com ). Even if you don't have the book, there's a PDF version available for free in Spanish (and some other languages), which may be enough for your purposes.

Barring that, I find the PDFs from the rv8 project concise, and really useful: https://github.com/rv8-io/rv8/tree/master/doc/pdf . (It's information that of course is present in the specs, but I couldn't find a short, 10-page document there containing it all.) It's generated from the riscv-meta project which has machine-parseable descriptions of the ISA, which may be useful as well depending what you're trying to do.