#as -o cpuid.o cpuid.s
cpuid.s: Assembler messages:
cpuid.s:8: Error: unknown mnemonic `movl' -- `movl $0,%eax'
cpuid.s:9: Error: unknown mnemonic `cpuid' -- `cpuid'
cpuid.s:10: Error: unknown mnemonic `movl' -- `movl $output,%edi'
cpuid.s:11: Error: unknown mnemonic `movl' -- `movl %ebx,28(%edi)'
cpuid.s:12: Error: unknown mnemonic `movl' -- `movl %edx,32(%edi)'
cpuid.s:13: Error: unknown mnemonic `movl' -- `movl %ecx,36(%edi)'
cpuid.s:14: Error: unknown mnemonic `movl' -- `movl $4,%eax'
cpuid.s:15: Error: unknown mnemonic `movl' -- `movl $1,%ebx'
cpuid.s:16: Error: unknown mnemonic `movl' -- `movl $output,%ecx'
cpuid.s:17: Error: unknown mnemonic `movl' -- `movl $42,%edx'
cpuid.s:18: Error: unknown mnemonic `int' -- `int $0x80'
cpuid.s:19: Error: unknown mnemonic `movl' -- `movl $1,%eax'
cpuid.s:20: Error: unknown mnemonic `movl' -- `movl $0,%ebx'
cpuid.s:21: Error: unknown mnemonic `int' -- `int $0x80'
#cat cpuid.s
#cpuid.s Sample program to extract the processor Vendor ID
.section .data
output:
.ascii "The processor Vendor ID is 'xxxxxxxxxxxx'\n"
.section .text
.global _start
_start:
movl $0, %eax
cpuid
movl $output, %edi
movl %ebx, 28(%edi)
movl %edx, 32(%edi)
movl %ecx, 36(%edi)
movl $4, %eax
movl $1, %ebx
movl $output, %ecx
movl $42, %edx
int $0x80
movl $1, %eax
movl $0, %ebx
int $0x80
How to rewrite this Intel assembly to Pi assembly code, to get CPU vendor ID, and write()
it to stdout.
uname -a
output: Linux ubuntu 5.4.0-1047-raspi #52-Ubuntu SMP PREEMPT Wed Nov 24 08:16:38 UTC 2021 aarch64 aarch64 aarch64 GNU/Linux
One way is to parse /proc/cpuinfo
; the format is designed to be easy to parse with fscanf
. Each processor has a CPU implementer
line with an 8-bit hex implementer code. A table of the corresponding implementers can be found in the Armv8 Architecture Reference Manual under the description of the MIDR_EL1
system control register.
Note that the "implementer" is the organization that designed the core, which may not be the same as the company whose name is on the physical chip. For instance, the Raspberry Pi 4B has a Broadcom SoC, but the core used within it is a Cortex A72 designed by Arm, so the implementer code is 0x41 which is Arm, not 0x42 which is Broadcom.
Another way to get this code is to read the MIDR_EL1
register with an assembly instruction like mrs x0, MIDR_EL1
. The register can only actually be read at exception level 1 (per the EL1
in its name), and not from a user-space program running at exception level 0. However, executing this instruction causes a trap which the Linux kernel handles and emulates the instruction, so mrs x0, MIDR_EL1
does in fact "work" from userspace. (This might vary with different kernel configurations.) The implementer code is bits 24-31 of the returned value.
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