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Target Code Generation using limited available registers

Translate the following code it into machine code and show the register and address descriptors while the instructions are generated. (Assume that two registers are available: R0 and R1.)

D : = B - C 
E : = A - B 
B : = B + C 
A : = E - D

I tried something like this:

MOV B,R0
SUB C,R0  
MOV A,R1
SUB B,R1

-- R0 contains D -- R1 contains E

I cannot proceed from here. Since B has no next use in the block (from line number 3), how would the following code turn out?

Assuming some basics about the processor, given your attempt:

You have D:= B - C almost completed — just store the result into D to finish.

MOV B,R0
SUB C,R0
MOV R0,D

Now all the registers are once again available (though if you happen to need D again immediately, a copy is in R0 — this is hard to take advantage of, though, given the limited registers and other computations to be done).

How do I know that a move to memory is possible? I don't but based on educated guessing, it would be very odd to have mov A,R0 , but not mov R0,A .

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