This is my first, attempt at a, Makefile after necessity from a previous post .
Anyway here's the code
SortLab.exe : SelectionSort.o Main.o
g++ -o $@ $^
SelectionSort.o : SelectionSort.cpp SelectionSort.h
Main.o : Main.cpp
#-------------------------------------------------------------
run: SortLab.exe
./SortLab.exe
clean:
rm -f *.o
rm -f *.exe
build: clean SortLab.exe
%.o: %.cpp
g++ -c $<
I intend to have SelectionSort.cpp
& SelectionSort.h
form an object file, and Main.cpp
to form its own object file. Then finally create an executable. Main.cpp
depends on SelectionSort.cpp
, where do I go wrong?
Also where can I find what the different GNU
commands mean, -o
-c
and such
%.o: %.cpp
rule yourself, Make knows how to compile C++. Main.o : Main.cpp SelectionSort.h
. build
shouldn't depend on clean
, it defeats one of Make's main features (selectively recompilation when files have changed). build
the first target, you can run Make without a target to get a full compile. It's customary to call the main target all
.
The technical post webpages of this site follow the CC BY-SA 4.0 protocol. If you need to reprint, please indicate the site URL or the original address.Any question please contact:yoyou2525@163.com.