I just wanna collect some evidence-based info about the requirement for the atomic operation.
eg (maybe not right, just some example)
at x86_64, when you write or read on the entry sizeof long and aligned by long, the operation is aotmic,because balabalabala ...
at x86_64, when you write or read bytes use gcc atomic primitive , your operation on these bytes will keep atomic.
Hope to receive and help :)
Quote from Professional C++ :
A simple assignment to a simple scalar variable typically requires no synchronization. For example, on the x86, a 32-bit aligned value is handled atomically at the hardware level and a single transaction requires no explicit synchronization. For example, setting a Boolean value to false to stop a thread requires no synchronization, but an operation like ++, -- or op= for any given op requires synchronization.
This doesn't answer all your questions, but is this part of what you were looking for?
If you're looking for the chip-level guarantees you will need to consult the technical manuals for those chips. On Intel check out the S oftware Developer Manuals which has the compelete information on memory ordering. The definition of atomic in this case includes a memory ordering guarantee. The basic guarantees are listing in "Volume 3: 8.2 Memory Ordering", where additionally some functions are marked as behaving in an "atomic" fashion.
Note the complete details are complex and require a detailed understanding of the chip. This is why C and C++ now wrap them in higher level guarantees. You can of course consult those respective standards to see their guarantees.
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