I have gone through the link Passing additional variables from command line to make .
I have a project which compiles both on Linux and Windows using makefiles. In Windows it uses gcc while in Linux it uses the ARM version of gcc
ie armv7-linux-gcc
. I would like to use a command line variable which tells the makefile which compiler to use depending on Windows or Linux.
For example in Windows it should have something like this:
CC= gcc
CFLAGS= -c -D COMPILE_FOR_WINDOWS
and for Linux:
CC = armv7-linux-gcc
CFLAGS = -c -D COMPILE_FOR_LINUX
These preprocessor defines COMPILE_FOR_WINDOWS and COMPILE_FOR_LINUX are present in the code base and can't be changed.
Also for make clean it should clean up both for Windows and Linux. I can't assume that I people who build this will have Cygwin installed so can't use rm
for deleting files.
This answer is only valid if you're using GNU make or similar:
Conditionally set your make variables using an Environment Variable.
For the 'clean' rule to function properly, you may also have to create a make variable for any differences in file extensions for either OS.
Naive example:
ifeq ($(OS), Windows_NT)
CC=gcc
RM=del
EXE=.exe
CFLAGS=-c -DCOMPILE_FOR_WINDOWS
else
CC=armv7-linux-gcc
RM=rm
EXE=
CFLAGS=-c -DCOMPILE_FOR_LINUX
endif
PROG=thing$(EXE)
.PHONY: all
all: $(PROG)
$(CC) $(CFLAGS) -o $(PROG) main.c
.PHONY: clean
clean:
-$(RM) $(PROG) *.o
Maybe you could use ant (with a build.xml file) to build the project. Else, in a Makefile, you would need to check the system and put some conditions to check wether you are making the project in an Unix environment or a Windows environment.
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