Testing my HDL Code (Verilog/VHDL) without an FPGA?

Question

I've written a module in Verilog using vi as my editor and now I want to test it. What are my options if I have no board? How can I give my module inputs? Where can I see the results? I have access to VCS by the way.

Thank you.

Answer 1

You are probably looking for a simulator.

First, you have to write a testbench which wraps around your Verilog module and drives the input signals. This testbench can also check that the output of your module matches the expected output. You can find many tutorials on writing testbenches online.

This testbench and your module are then "executed" in a simulator. I'm not familiar with all the options, but I know the free Xilinx ISE Web Pack includes a simulator. Modelsim is a commercial package. They also offer a free student edition.

Answer 2

For anyone else who has the same question, I found a testbench tutorial, like Vortexfive suggested, in the link bellow:

http://www.asic-world.com/verilog/art_testbench_writing.html