FMUL does not clear overflow in STATUS register

Question

I have this Win32 code:

fld x
fmul y
fstsw ax

It seems that fmul does not clear FPU status registers bit, ie if overflow was already set ( ax & 8) then it will stay set after fmul . Is it the correct behavior? Is it required to clear status after or before FPU operations?

Ie I suppose fmul will set this bit, but should it reset it? I could not find the answer online.

Answer 1

You bet it is correct behavior.

From 8.1.3.3 x87 FPU Floating-Point Exception Flags of Intel® 64 and IA-32 Architectures Software Developer's Manual , volume 1:

The exception flags are “sticky” bits (once set, they remain set until explicitly cleared). They can be cleared by executing the FCLEX/FNCLEX (clear exceptions) instructions, by reinitializing the x87 FPU with the FINIT/FNINIT or FSAVE/FNSAVE instructions, or by overwriting the flags with an FRSTOR or FLDENV instruction.

It is not required to reset these flags if FPU exceptions are disabled.