Verilog: How to declare many reg in generate statement according to genvar i

Question

I want to declare many reg in generate statement according to genvar i. For example, I want to declare reg_0, reg_1, reg_2 ... reg_9 if genvar i = 10 i.

How can I do this?

Answer 1

I think you have to declare them as arrays. My Verilog is a little rusty, but I think something like this should work:

reg [width-1:0] foo [0:i - 1];