How to initialize a bit vector in VHDL

Question

I want to have a bit vector, I want it to have a value 2. I tried many things but I always get an error. Now I have this :

variable var : bit_vector := B"00000000000000000000000000000100";

I get these errors :

can't match integer literal with type array type "bit_vector"

and

declaration of variable "var" with unconstrained array type "bit_vector" is not allowed

How can I fix this? Thanks.

Answer 1

You must give var a range (constrain it), like:

variable var : bit_vector(31 downto 0) ...

Then you can assign a constant to it for example with:

library ieee;
use ieee.numeric_bit_unsigned.all;
...
variable var : bit_vector(31 downto 0) := to_bit_vector(2, 32);

or with initial value given as bit string like:

variable var : bit_vector(31 downto 0) := "00000000000000000000000000000010";

The use of to_bit_vector is less error prone, as you can see, since the constant in your example code is not 2 but actually 4 ;-)

Answer 2

A more objective, generic assignment is the following:

var := (1=>'1', others=>'0');

Answer 3

Adding to @MortenZilmer's answer, please note that:

1. The compiler doesn't have a problem with your original code if you declare a constant instead of a variable:

constant const: bit_vector := b"00000000000000000000000000000100"; -- works OK

1. You can make the bitstring literal more readable if you write it in base 10. You can also specify the number of bits of the bitstring literal, as per the example below:

variable var: bit_vector(31 downto 0) := 32d"2";