Makefile without specifying the source file

Question

I have a makefile as follows:

# Makefile for VocabLearn

MACHTYPE=$(shell uname -m)

GCC         = g++

CC=gcc
# OPTFLAGS=-g2
OPTFLAGS=-O3 -ffast-math -Wall -mfpmath=sse -msse2 -funroll-loops -march=core2
OTHERFLAGS=-Wall -fopenmp

INCLUDE_PATH=-I../lib/ann_1.1/include/ANN -I../lib/ann_1.1_char/include/ANN \
    -I../lib/imagelib -I../VocabLib -I../lib/zlib/include
LIB_PATH=-L../lib -L../VocabLib -L../lib/zlib/lib

OBJS=VocabLearn.o

LIBS=-lvocab -lANN -lANN_char -limage -lz

CPPFLAGS=$(INCLUDE_PATH) $(LIB_PATH) $(OTHERFLAGS) $(OPTFLAGS)

BIN=VocabLearn

all: $(BIN)

$(BIN): $(OBJS)
    g++ -o $(CPPFLAGS) -o $(BIN) $(OBJS) $(LIBS)

clean:
    rm -f *.o *~ $(LIB)

When I 'make' it in the prompt, it works fine and output the following info:(I use Mac OS, c++ means clang compiler)

c++ -I../lib/ann_1.1/include/ANN -I../lib/ann_1.1_char/include/ANN -I../lib/imagelib -I../VocabLib -I../lib/zlib/include -L../lib -L../VocabLib -L../lib/zlib/lib -Wall -fopenmp -O3 -ffast-math -Wall -mfpmath=sse -msse2 -funroll-loops -march=core2 -c -o VocabLearn.o VocabLearn.cpp

g++ -o -I../lib/ann_1.1/include/ANN -I../lib/ann_1.1_char/include/ANN -I../lib/imagelib -I../VocabLib -I../lib/zlib/include -L../lib -L../VocabLib -L../lib/zlib/lib -Wall -fopenmp -O3 -ffast-math -Wall -mfpmath=sse -msse2 -funroll-loops -march=core2 -o VocabLearn VocabLearn.o -lvocab -lANN -lANN_char -limage -lz

I just want to know how this makefile works. As you can see, since this makefile doesn't specify which source code to compile, how does the compiler know it is 'VocabLearn.cpp' that it should process? (My guess is that it will search source file according to the name of the object file, VocabLearn.o) Also this line seems a bit strange for me:

g++ -o $(CPPFLAGS) -o $(BIN) $(OBJS) $(LIBS)

Why is there a '-o' before '$(CPPFLAGS)'?

Answer 1

This makefile is using implicit rules to compile the source files. The rule:

$(BIN): $(OBJS)

asks for the object files in OBJS , and make already knows how to build VocabLearn.o if there is a file VocabLean.cpp .

Answer 2

Basically there is an implicit rule to convert *.cpp files to *.o files, however you have to have *.o as a dependency in one your targets. In the given Makefile, you have VocabLearn.o as a dependency for $(BIN). So, VocabLearn.o gets auto-generated from VocabLearn.cpp file.