pass multiple arguments from makefile

Question

My task is to pass multiple arguments to one of my executable binary files. For example, I have a binary which takes 6 arguments, so it works fine when I type:

./a.out 1 2 3 4 5 6

I want to do the same using a makefile so that when I type make INPUT=1 2 3 4 5 6 it should execute the a.out with all the six arguments in the INPUT. I can do this if I pass the arguments with escape characters like:

make INPUT=1\ 2\ 3\ 4\ 5\ 6

but is there any way to make it execute like

make INPUT=1 2 3 4 5 6

makefile contents:

@gcc prime.c
@./a.out ${INPUT}

Answer 1

把args放在引号内。

make INPUT="1 2 3 4 5 6"

Answer 2

Additionally to how to handle arguments when passing via make :

If you need to pass a "multi-word phrase" as a single argument (as @jonathan-leffler suggested in a comment to the question), just put ${INPUT} part of your makefile into quotes:

@gcc prime.c
@./a.out "${INPUT}"

PS Both of single & double quotes are approachable.