How to constrain a word aligned address which is non zero value?

Question

I want to constrain my address in Packet class such that

1. addr is non 0
2. addr is word aligned

addr is 32 bit unpacked array of 32 bit vectors and it is declared in Packet class as

class Packet;
    
    rand bit [31:0] dest_addr;
    rand bit [31:0] source_addr;
    rand bit [7:0] data_length;
    rand byte data[];
    rand byte fcs;
    rand bit [31:0] addr [0:3];
    string name;
    rand bit [28:0] n;
    rand bit [3:0] test;
    static int count;
        
    rand da_kind_t da_kind;
    rand fcs_kind_t fcs_kind;
    rand length_kind_t length_kind;
  
   constraint c_n {
    n != 0;
  }
      
    //Word alignment constraint 
    constraint c_addr {
      foreach(addr[i]) 
        addr[i] == 4*n; 
    }

with the error message :

Driver_mem.sv(20): randomize() failed due to conflicts between the following constraints:
#   Packet.sv(29): c_n { (n != 0); }
# Where:
#   n = 29'h00000000 /* non-random */ 
# ** Note: (vsim-7130) Enabling enhanced debug (-solvefaildebug=2) may generate a more descriptive constraint contradiction report.
#    Time: 0 ps  Iteration: 2  Instance: /tb_router/test
# ** Note: (vsim-7106) Use vsim option '-solvefailtestcase[=filename]' to generate a simplified testcase that will reproduce the failure.
#    Time: 0 ps  Iteration: 2  Instance: /tb_router/test

However the constraint resolver fails. I have also tried these methods, which also fail.

constraint c_addr {
    foreach(addr[i])
        addr[i][31:2] != 0;
        addr[i][1:0] == 0;
}

This method also fails

constraint c_addr {
   addr[0] > 0;
   addr[1] > 0;
   addr[2] > 0;
   addr[3] > 0;
}

constraint c_addr1 {
   foreach(addr[i])
      addr[i][1:0] == 0;
}

with the output message:

Driver_mem.sv(20): randomize() failed due to conflicts between the following constraints:
#   Packet.sv(23): c_addr { (addr[0] > 0); }
#   Packet.sv(24): c_addr { (addr[1] > 0); }
#   Packet.sv(25): c_addr { (addr[2] > 0); }
#   Packet.sv(26): c_addr { (addr[3] > 0); }
#   Packet.sv(31): c_addr1 { (addr[3][1:0] == 0); }
#   Packet.sv(31): c_addr1 { (addr[2][1:0] == 0); }
#   Packet.sv(31): c_addr1 { (addr[1][1:0] == 0); }
#   Packet.sv(31): c_addr1 { (addr[0][1:0] == 0); }
#   Packet.sv(97): c_dest_addr { (dest_addr inside { addr[3], addr[2], addr[1], addr[0] }); }
# Where:
#   addr[0][1:0] = 2'h0
#   addr[1][1:0] = 2'h0
#   addr[2][1:0] = 2'h0
#   addr[3][1:0] = 2'h0
#   dest_addr = 0 /* non-random */ 
# Given:
#   bit [31:0] addr[3]
#   bit [31:0] addr[2]
#   bit [31:0] addr[1]
#   bit [31:0] addr[0]

Also these 4 methods, though does not fail but gives the output as

# addr0: 0x00000000
# addr1: 0x00000000
# addr2: 0x00000000
# addr3: 0x00000000



//Word alignment constraint 
    constraint c_addr {
      foreach(addr[i]) {
            addr[i][31:2] != 0;
            addr[i][1:0] == 0;  
      }
    }

constraint c_addr0 {
      addr[0] == 4*(n+1);
      addr[1] == 4*(n+2);
      addr[2] == 4*(n+3);
      addr[3] == 4*(n+4);
}

constraint c_addr0 {
      addr[0] == 4*(n+1);
      addr[1] == addr[0] + 4;
      addr[2] == addr[1] + 4;
      addr[3] == addr[2] + 4;     
    }

constraint c_addr0 {
        foreach(addr[i])
          addr[i] == (i+4);
    }

The Packet is for a 1x4 router verification and the requirement is that address of the destination port has to be word aligned, at the same a non 0 value. Any help is appreciated. Also, please note that the addr is to be randomized just once, ie just one set of 4 unique non 0 word aligned addressses and if I just provide word aligned constraint, I get always one addr in the array which is 0x00000000.

Answer 1

I want to constrain my address in Packet class such that

1. addr is non 0
2. addr is word aligned

addr is 32 bit unpacked array of 32 bit vectors and it is declared in Packet class as

class Packet;
    
    rand bit [31:0] dest_addr;
    rand bit [31:0] source_addr;
    rand bit [7:0] data_length;
    rand byte data[];
    rand byte fcs;
    rand bit [31:0] addr [0:3];
    string name;
    rand bit [28:0] n;
    rand bit [3:0] test;
    static int count;
        
    rand da_kind_t da_kind;
    rand fcs_kind_t fcs_kind;
    rand length_kind_t length_kind;
  
   constraint c_n {
    n != 0;
  }
      
    //Word alignment constraint 
    constraint c_addr {
      foreach(addr[i]) 
        addr[i] == 4*n; 
    }

with the error message :

Driver_mem.sv(20): randomize() failed due to conflicts between the following constraints:
#   Packet.sv(29): c_n { (n != 0); }
# Where:
#   n = 29'h00000000 /* non-random */ 
# ** Note: (vsim-7130) Enabling enhanced debug (-solvefaildebug=2) may generate a more descriptive constraint contradiction report.
#    Time: 0 ps  Iteration: 2  Instance: /tb_router/test
# ** Note: (vsim-7106) Use vsim option '-solvefailtestcase[=filename]' to generate a simplified testcase that will reproduce the failure.
#    Time: 0 ps  Iteration: 2  Instance: /tb_router/test

However the constraint resolver fails. I have also tried these methods, which also fail.

constraint c_addr {
    foreach(addr[i])
        addr[i][31:2] != 0;
        addr[i][1:0] == 0;
}

This method also fails

constraint c_addr {
   addr[0] > 0;
   addr[1] > 0;
   addr[2] > 0;
   addr[3] > 0;
}

constraint c_addr1 {
   foreach(addr[i])
      addr[i][1:0] == 0;
}

with the output message:

Driver_mem.sv(20): randomize() failed due to conflicts between the following constraints:
#   Packet.sv(23): c_addr { (addr[0] > 0); }
#   Packet.sv(24): c_addr { (addr[1] > 0); }
#   Packet.sv(25): c_addr { (addr[2] > 0); }
#   Packet.sv(26): c_addr { (addr[3] > 0); }
#   Packet.sv(31): c_addr1 { (addr[3][1:0] == 0); }
#   Packet.sv(31): c_addr1 { (addr[2][1:0] == 0); }
#   Packet.sv(31): c_addr1 { (addr[1][1:0] == 0); }
#   Packet.sv(31): c_addr1 { (addr[0][1:0] == 0); }
#   Packet.sv(97): c_dest_addr { (dest_addr inside { addr[3], addr[2], addr[1], addr[0] }); }
# Where:
#   addr[0][1:0] = 2'h0
#   addr[1][1:0] = 2'h0
#   addr[2][1:0] = 2'h0
#   addr[3][1:0] = 2'h0
#   dest_addr = 0 /* non-random */ 
# Given:
#   bit [31:0] addr[3]
#   bit [31:0] addr[2]
#   bit [31:0] addr[1]
#   bit [31:0] addr[0]

Also these 4 methods, though does not fail but gives the output as

# addr0: 0x00000000
# addr1: 0x00000000
# addr2: 0x00000000
# addr3: 0x00000000



//Word alignment constraint 
    constraint c_addr {
      foreach(addr[i]) {
            addr[i][31:2] != 0;
            addr[i][1:0] == 0;  
      }
    }

constraint c_addr0 {
      addr[0] == 4*(n+1);
      addr[1] == 4*(n+2);
      addr[2] == 4*(n+3);
      addr[3] == 4*(n+4);
}

constraint c_addr0 {
      addr[0] == 4*(n+1);
      addr[1] == addr[0] + 4;
      addr[2] == addr[1] + 4;
      addr[3] == addr[2] + 4;     
    }

constraint c_addr0 {
        foreach(addr[i])
          addr[i] == (i+4);
    }

The Packet is for a 1x4 router verification and the requirement is that address of the destination port has to be word aligned, at the same a non 0 value. Any help is appreciated. Also, please note that the addr is to be randomized just once, ie just one set of 4 unique non 0 word aligned addressses and if I just provide word aligned constraint, I get always one addr in the array which is 0x00000000.

Answer 2

Word aligned means 2 LSB = 0 , right. Why is it so difficult? Am I missing something here, isn't it as simple as

constraint
(addr[1:0] == 0)
(addr[31:2] !=0)