How can I generate AHB memory port in Rocket chip

Question

I am trying to implement a Rocket chip SoC design; the SoC design will generate an AXI memory port by default. But I want to use the AHB memory port, and the Rocket chip doesn't have any configs for that. Has someone already done that?

thanks

Answer 1

Similar to the AXI4MemPort in subsystem/Ports.scala the general idea is to instantiate an AHBSinkNode and connecting to it through a TLToAHB widget.

trait CanHaveAhbMemPort { this: BaseSubsystem =>
  private val memPortParamsOpt = p(AhbExtMem) // could also add a parameter to switch between axi/ahb
  private val portName = "ahb"
  private val device = new MemoryDevice
  private val idBits = memPortParamsOpt.map(_.master.idBits).getOrElse(1)
  val memAhbNode = AHBSlaveSinkNode( memPortParamsOpt.map({ case MemoryPortParams(memPortParams, nMemoryChannels) =>
    Seq.tabulate(nMemoryChannels) { channel =>
      val base = AddressSet.misaligned(memPortParams.base, memPortParams.size)
      val filter = AddressSet(channel * mbus.blockBytes, ~((nMemoryChannels-1) * mbus.blockBytes))

    AHBSlavePortParameters(
      Seq(AHBSlaveParameters(
        address       = base.flatMap(_.intersect(filter)),
        resources     = device.reg,
        regionType    = RegionType.UNCACHED
        executable    = executable,
        supportsRead  = TransferSizes(1, memPortParams.beatBytes * AHBParameters.maxTransfer),
        supportsWrite = TransferSizes(1, memPortParams.beatBytes * AHBParameters.maxTransfer))),
        beatBytes  = memPortParams.beatBytes,
       lite = false)
    }
  }).toList.flatten)

  mbus.coupleTo(s"memory_controller_port_named_$portName") { 
    (memAhbNode 
      :*= TLToAHB()
      :*= TLWidthWidget(mbus.beatBytes)
      :*= _)
} 

Note : I haven't tested this. This hopefully illustrated the general idea for how to swap out the mem port with AHB. There may need to be some experimentation as far as parameters and widget use goes. Hopefully, a future answer or an edit this answer can reflect the results of any testing or experience with this conversion.