I'm running a buildroot linux environment on a STM32MP157 dev board. I have a button with an internal pullup on pin B12. I want to fire an interrupt o ...
I'm running a buildroot linux environment on a STM32MP157 dev board. I have a button with an internal pullup on pin B12. I want to fire an interrupt o ...
I have a HW_IRQ is shared between 2 kernel modules. Module1 is loaded at the boot time and called: request_irq(linux_irq1, handler1, IRQF_SHARED, ...) ...
I am looking at the following function which retargets stdout to UART in the STM32 Std peripheral library. Before transmitting over UART it masks e ...
For my application (running on an STM32L082) I need accurate (relative) timestamping of a few types of interrupts. I do this by running a timer at 1 M ...
I am developing an operating system as an hobby, and I'm having a strange issue when handling keyboard IRQ, I don't know why but I'm getting an Invali ...
I'm currently working on a small library that simplifies the use of 433MHz RF modules. The problem I'm facing right now is that when I'm trying to cre ...
I recently added a part to an application of mine which is meant to allow it to operate with an IRQ belonging to the secondary PIC. In particular, the ...
I have been trying to loosely follow this tutorial on basic kernel dev. Currently, the target architecture is i386. The implementation of IRQs is cau ...
i want to set rise the priority and the affinity of irq processes (spi, gpiod) in linux, from a program written in C/C++. To set the priority of my ow ...
I'm running qemu-system-x86_64 with my new pci device. And i want to use IRQ 17 (Since driver from kernel listen for IRQ 17). But my PCI device take I ...
I'm sure there's a good reason for this, but I can't see what it is. Inside __handle_irq_event_percpu the kernel loops over all the handlers registere ...
I'm trying to implement a simple interrupt controller for my RV32I core. I believe I understand how an interrupt should be handled in RISC-V, and the ...
Is it possible to execute an IRQ in EL3 (secure monitor) if IRQ was fired in EL1 context? E.g. I have entered EL1 via spsr_el3 (el1h selected) and aft ...
I am looking for how a RISC-V processor processes interrupt requests. I looked at the Instruction Set Manuals and information on the internet. The fo ...
I am writing a simple driver, which could register an interrupt and handle it. I am using the request_irq function but it returns this error: This ...
I am reading OS and CPU concepts for writing device driver and i came across "deferred procedure call (DPC)" and how kernel interacts with DPC and IRQ ...
I am currently refactoring a driver for the AMD Sensor Fusion Hub. The original driver can be found here. When sending commands to the device, the chi ...
I'm to developing my own serial code (rather than using CubeMX's HAL) to interface an existing protocol codebase which needs low-level serial features ...
I'm researching the the Arm Architecture Reference Manual ARMv7-A ARMv7-R edition document these days. When I read about the exception handling part o ...
I've stumbled upon the beforementioned error (disabling IRQ #31) during boot and have tried to resolve it by trying to find out what caused the interr ...