Chisel3：如何删除 Bundle 定义中的 Input 和 Output

Question

If I have

class ios extends Bundle{
  val wen = Input(Bool())
  val wdata = Input(UInt(8.W))
  val rdata = Output(UInt(8.W))
}

With Flipped I can get something like

class flipped_ios extends Bundle{
  val wen = Output(Bool())
  val wdata = Output(UInt(8.W))
  val rdata = Input(UInt(8.W))
}

Can I gain something like

class plain_ios extends Bundle{
  val wen = Bool()
  val wdata = UInt(8.W)
  val rdata = UInt(8.W)
}

without copying, pasting and deleting the code?

Answer 1

You can apply Output and Input to a bundle, just like Flipped . Output will make all wires in the bundle outputs. Since output is the default, afaik, applying Output to your bundle should bring everything back to default orientation.