Simulation of cache

Question

I have to code the simulation of a cache

My requirements are

1. It should show the results of running about 20 instructions through the cache. (instructions can be of any generic RISC format).

for example

ld r1,r2 loads the value of Reg. r2 into r1

add r3,r1,#4 add the contents of r1 with 4

mov r10,r3 move the contents of r3 with r10

mul r7,r3,r8 multiply the contents of r3 and r8 and store the result in r7

shl r9 shift left the contents of register r9

bnez r5,loop branch to loop if r5 not equal to zero

like above instruction test the architecture of the cache. Instructions should be chosen to highlight the features of cache architecture.

1. Result should include execution speed of running the instructions without a cache compared to implementing various optimizations.

2. Implementing cache optimizations such as set associative caches and multi-level caches.

I m thinking of doing this in C++ or Matlab

Can someone please give me an idea how to start? how should I plan doing it? Thanks

Answer 1

Are you looking something like this.,

http://www.ecs.umass.edu/ece/koren/architecture/

There are various stimulation on this site., just browse through the link fully..,

http://www.ecs.umass.edu/ece/koren/architecture/Cache/default.htm

Answer 2

I suggest you have two types of memory simulator classes: RAM and Cache . Each should have a read function. The read functions should have different delays before returning a value.

As an example, make the RAM::read() function delay 2 seconds before returning a value.

Similarly, the Cache::read() read function would delay 1 second before returning a value.

For a simulated architecture that uses Cache, search the cache for the data. If the data doesn't exist in the Cache, read it from RAM.

For more accurate time ratios, search the web for "level 1 cache access time" and "SRAM access time".