When I'm working on a bash script and need to write a particularly complex logic I usually fall back on using python, like this:
#!/bin/bash
function foo() {
python << END
if 1:
print "hello"
END
}
foo
How can I do the same thing from within a Makefile?
You may write a bash script containing your functions, say myscript.sh
:
#!/bin/bash
foo() {
python << END
if 1:
print "hello $1"
END
}
Now here is a Makefile
:
SHELL = /bin/bash
mytarget ::
@source myscript.sh ;\
foo world
Finally type in your terminal:
$ make mytarget
hello world
Some explanations on the Makefile
: defining SHELL
let make
know which shell to run. The ::
stands for phony target (and a little more); you can replace it with :
for an actual target.
The key point is to run source
and call the function in the same shell, that is, in the same line (since make
run a different shell for each line); this is achieved by ;\\
at the end of each line.
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