makefile performs target even without any changes

Question

I have a simple makefile that works fine, but it seems to perform the all target even if no changes occurred. I would expect a

make: Nothing to be done for 'all'.

Message, but it keeps executing the target whenever I call make . Here is my simple makefile:

BASEDIR = /home/someuser/STA
SRC_DIR = ${BASEDIR}/src
OBJ_DIR = ${BASEDIR}/obj
INC_DIR = ${BASEDIR}/inc

SRC_FILES        = $(wildcard  ${SRC_DIR}/*.cpp)
SRC_FILES_NOTDIR = $(notdir    ${SRC_FILES})
OBJ_FILES_NOTDIR = $(patsubst  %.cpp, %.cpp.o, ${SRC_FILES_NOTDIR})
OBJ_FILES        = $(addprefix ${OBJ_DIR}/,${OBJ_FILES_NOTDIR})
INC_FILES        = $(wildcard  ${INC_DIR}/*.h)

all: ${OBJ_FILES}
    g++ ${OBJ_FILES} -o program

${OBJ_DIR}/%.cpp.o: ${SRC_DIR}/%.cpp ${INC_FILES}
    g++ -I${INC_DIR} -o $@ -c $<

And here is what printed to terminal when I call make twice:

$ make
g++ <somedir/file1>.cpp.o <somedir/file2>.cpp.o -o program
$ make
g++ <somedir/file1>.cpp.o <somedir/file2>.cpp.o -o program

Answer 1

Replace all that is not a file and does not exist (reason why make tries to build it each time) by program , a real file that make can see. If you really want an all symbolic target, declare it as phony and add a rule without recipe to tell make that all depends on program :

.PHONY: all
all: program