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reg_write64 MMIO register error in rocket chip

I am trying to write a 64 bit word to the MMIO register using the reg_write64 construct defined in mmio.h . Everything works fine as long as the wire that I map this register to in chisel land is not decoupled. As soon as I make this wire decoupled the execution hangs and does not complete. For example, this is my Chisel code

val wireToConnect = Wire(Decoupled(Bits(64.W))) //This  works when I don't have decoupled
regmap(
0x00 -> Seq(RegField.w(64, wireToConnect))))

And this is my C code for writing into this register

#include "mmio.h"
#define WRITEVAL 0x2000
int main(void){
    uint64_t data = 123456;
    reg_write64(WRITEVAL, data);
}

However when I replace reg_write64 with reg_write32 this works. Is there any particular setting which we need to set to make sure that decoupled interfaces can work with 64 bit wide registers?

The problem is with the bit width. Since it is already 64 bits, a decoupled is going to add a ready and valid bit to this interface which exceeds the bitwidth allowed by registers. We get an error that regmap is overlapping if we have more than 64 bits.

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