How to implement interfaces in MyHDL

Question

In VHDL, I often use records to group related signals into something that can be passed around as a single object, eg in a port map. What's the MyHDL way of doing this?

Answer 1

Interfaces are available in the 0.9-dev and are straightforward. If you have an object (class) with Signals in it it will be name extended in conversion.

It is explained in the MEP http://www.myhdl.org/doku.php/meps:mep-107

More examples available here (I realize it is not well documented - yet):

https://bitbucket.org/cfelton/minnesota

Also, a small example available here:

http://www.edaplayground.com/s/130/941